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Tomorrow’s chips, naturally

17.12.2004


Visionaries more than half a century ago imagined machines capable of growth, self-repair and self-replication. By digitally mimicking biological tissue’s properties, European researchers recently demonstrated a platform for autonomous computer systems.

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»FPGAs »POEtic »Tomorrow’s

“There are three ways to model hardware on self-organising biology,” says Juan-Manuel Moreno, coordinator of the IST POEtic project. “They are development, learning and evolution – respectively known to biologists as ontogenesis, epigenesis and phylogenesis. All three models are based on a one-dimensional description of the organism, the genome.”

In the early 1990s, computer scientists tested systems that mimic the development of an individual as directed by their genetic code. Then they started to use artificial intelligence to copy the processes of learning, as influenced by an individual’s genetic code and their environment. “But until our project, nobody had succeeded in bringing together all three models in a single piece of hardware,” adds Moreno.


In May 2004, the partners received the first POEtic chips. Each one included a specially developed microprocessor, designed to run evolutionary algorithms, and a basic programmable unit. “The electronic substrate in this unit is like a living molecule, made up of various elements or cells,” says the coordinator. Each cell can communicate with the environment (through sensors and actuators) and with neighbouring cells (through bi-directional channels), thus executing a function.

Though each cell has the same basic structure, it can acquire different functionalities – much like certain cells in a living organism. This flexibility comes from the organisation of the electronic cells into three layers. The genotype plane is like a digital genome, containing a full description of the organism. The configuration plane transforms the genome into a configuration string, which directly controls the processing unit of the phenotype plane.

Early simulations showed these substrate features would allow the chips to simulate anything. “By building and testing the chips, we proved the concept of adaptive and dynamic hardware,” says the coordinator. “They are adaptive because we can modify the system’s basic parameters and structure. And they are dynamic because these changes can be done autonomously and in real time.” Other chips can be modified in this way, but this can take hours or days using field-programmable gate arrays (FPGAs).

Aeronautic and automotive companies have expressed interest in the project’s findings. Both sectors would welcome the chance to organise and reconfigure systems in real time, as well as to have self-repair features and fail-safe parallel processing. “However, they would not necessarily need our chips, because they could use commercial FPGAs,” he says. “We will soon distribute the tools and code for emulating the functionality of our system on commercial components.”

The partners are awaiting delivery of 80 final chips. Each one is identical, but can be used with the others to scale up its capabilities. The chips will be tested in early 2005, using applications such as autonomous robots and speech synthesis software. Says Moreno: “We will definitively prove that the chips can evolve and learn. Our next goal is a project that adds analogue capabilities and more dynamism through complex algorithms.” As before, living beings will be the model for research.

Contact:

Prof. Juan-Manuel Moreno
Universitat Politècnica de Catalunya
Departament d’Enginyeria Electrònica
Edifici C4, Campus Nord, Gran Capità s/n
E-08034–Barcelona, Spain
Tel: +34-93-4015691
Fax: +34-93-4016756
Email: moreno@aha-dee.upc.es

Prof. Juan-Manuel Moreno | alfa

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